Low Power Consumption Analog Matched Filter
نویسندگان
چکیده
A low power consumption AMF (Analog Matched Filter) is proposed which utilizes capacitor Multiply and capacitor Accumulation operations. High speed high precision A/D converter is unnecessary because the proposed circuit directly samples received analog signal. The code shifting MF structure is used to prevent error from accumulating. A 15-tap AMF circuit was fabricated using CMOS process. Power consumption for 128-tap circuit is estimated as 2.35mW@25MHz 3.3V. The area is estimated as 1.6mm so that the proposed circuit will be applicable LSI for mobile terminals. Key-Words: DS-CDMA, Matched Filter, Analog circuit, Weighted-sum operation, Spread spectrum, Multiply and Accumulation operation
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